The present invention relates to an insulation gate bipolar transistor (hereinafter, being described “IGBT”) of lateral-type, a semiconductor integrated circuit device for use of driving a plasma display with using the same, and a plasma display apparatus.
In recent years, due to the feature of having a small region for separating devices and being free from parasitic transistor, developments have being made on a high-voltage power IC with using a SOI substrate, vigorously. The high-voltage power IC, into which the present invention is mainly applied, is a semiconductor IC for use of driving a plasma display, and the endurable voltage is 200V in the class thereof. In the developments of the high-voltage power IC, it is said to be necessary to improve an output feature or characteristic of the high-voltage output device for driving a load, directly, from a viewpoint of an improvement of the characteristic and reduction of a chip size. However, with a lateral-type IGBT, which is mainly applied as an output device for a power IC using the SOI substrate, for the purpose of forming an emitter/gate region and a collector region on the same plane, an area is reduce, which can be substantially conductive, i.e., a current capacity per the area of an element becomes small. Also, with the lateral-type IGBT, since a current component is large in the lateral direction of the element, a latch up can be generated, easily; there is a problem that an area or region is narrow for operating the element with stability. By taking this problem into the consideration, developments are made on the lateral-type IGBT that can increase the current capacity per a unit area and has a wide safe operating region. In this regard, the present inventors previously filed the invention for achieving a high outputting of the lateral-type IGBT, in Japanese Patent Laying-Open No. 2008-270377 [Patent Document 1].
The lateral-type IGBT of [Patent Document 1] has such structures as is shown in FIG. 2. In FIG. 2, an n-type semiconductor substrate 101 is disposed on a buried oxide layer 116 which is formed on a Si substrate 117. In this FIG. 2, on a surface layer of an n-type semiconductor substrate 101 is selectively formed a p-base region 102, and in a part of the surface layer of that p-base region 102 are formed two (2) pieces of n-emitter regions 104, where a p-contact region 103 is formed between those two (2) pieces of n-emitter regions 104, partially duplicating on the n-emitter regions 104. On a surface exposing portion of the n-type semiconductor substrate 101, on which no p-base region 102 is formed, a n-buffer region 109 is formed, selectively, and on a surface layer of that n-buffer region 109 is formed a p-collector region 110. And, on a surface of a channel region 114 on the surface layer of the p-base region 102 is provided a gate electrode 106, which is connected with a G terminal (e.g., a gate terminal) through a gate oxide film 105. Also, an emitter electrode 107 is provided, contacting on the surfaces of the n-emitter region 104 and the p-contact region 103 in common, and a collector electrode 111 is provided on the surface of the p-collector region 110, and they are connected with an E terminal (e.g., an emitter terminal) and a C terminal (e.g., a collector terminal), respectively. This structure corresponds to a right-half portion of the lateral-type IGBT obtainable by folding back in a plane of symmetry. The structure of FIG. 2 is characterized in that an n-layer 118, which is higher in the density than the n-type semiconductor 101, is formed to cover a p-base region at a central portion of the element. In the IGBT according to the invention of [Patent Document 1], due to a fact that a silicon layer between the first conductivity type layer 118 of high density, which covers the added emitter region mentioned above, and a buried oxide 116, is lowered in the resistance, current can also flow into the emitter/gate region separating from the collector region, but without increasing voltage drop therein, and thereby increasing the current density thereof, comparing to the conventional structure. However, within the IGBT having such the structure as shown in FIG. 2, since the breakdown voltage e goes down, abruptly, when the density of n-type impurity of the high-density n-layer 118, covering the p-base region at the central portion of the element, exceeds a certain value of density, there is a limit in an increase of the current density with an aid of the high density.